With development of technologies, Ethernet has developed from 10M Ethernet, 100M Ethernet, 1G Ethernet, and 10G Ethernet to 40G Ethernet and 100G Ethernet at present, and accordingly their rates also grow from 10 Mbit/s, 100 Mbit/s, 1 Gbit/s, and 10 Gbit/s to 40 Gbit/s and 100 Gbit/s at present. Currently, 40G Ethernet and 100G Ethernet have been widely adopted. However, rapidly emerging new services such as IP video and cloud computing drive service traffic to increase at a speed of 50%-60% every year. In the coming decade, service traffic will increase approximately 100 times and high bandwidth becomes an urgent need, which drives Ethernet to evolve to a higher rate. A rate of next generation Ethernet (collectively referred to as beyond-100G Ethernet in the present application) probably reaches 400 Gbit/s, 1 Tbit/s, or 1.6 Tbit/s. An Ethernet interface exceeding 100 Gbit/s is used between backbone routers, or between core switches, or between a backbone router and transmission equipment, or is used to interconnect cloud network data centers of an operator. This can effectively reduce costs.
As Ethernet rates increase, it is very difficult to provide a communication bandwidth exceeding 100 Gbit/s by increasing a transmission rate of a single channel. To achieve Ethernet rates exceeding 100 Gbit/s, a high order modulation method and multiple channels become available technologies. Using the high order modulation method can increase a transmission rate of a single channel as much as possible. In addition, multiple channels are used to perform concurrent transmission. Therefore, an overall transmission rate is increased. The increased transmission rate of a single channel and introduction of the high order modulation method result in a phenomenon of a large transmission loss and decreased receiver sensitivity, and therefore bit errors occur during line transmission. Therefore, for the beyond-100G Ethernet, an FEC (Forward Error Correction, forward error correction) function needs to be introduced to implement error-free transmission, and the introduced FEC function can provide a high coding gain and has a characteristic of small latency.
In existing 40G Ethernet and 100G Ethernet, the FEC function is introduced by adding an FEC sublayer to a physical-layer architecture. For the physical-layer architectures of 40G Ethernet and 100G Ethernet, refer to the standard IEEE 802.3ba. The physical-layer architecture includes the following sublayers: a PCS (Physical Coding Sublayer, physical coding sublayer), an FEC sublayer, a PMA (Physical Medium Attachment, physical medium attachment) sublayer, and a PMD (Physical Medium Dependent, physical medium dependent) sublayer. The following uses 100G Ethernet as an example to briefly describe a process related to FEC processing. In a sending direction, the PCS sublayer provides a 64B/66B code function and distributes 66B code blocks obtained by coding to 20 virtual channels; the FEC sublayer separately performs FEC processing based on the virtual channels, and separately performs FEC coding on the code blocks distributed to each virtual channel. Specifically, a Fire code (2112, 2080) is used to perform FEC coding. A synchronization header of each 66B code block is compressed to save 32-bit space for each 32 66B code blocks. The saved 32-bit space is used as a check area in which check information generated during an FEC coding process is filled. Processing of the PCS sublayer and FEC sublayer in a receiving direction is reverse to processing in the sending direction. For details, refer to the standard IEEE 802.3ba. The standard 802.3ba further indicates that a maximum coding gain provided in an FEC processing scheme based on the existing physical-layer architecture is only 2 dB and latency is 430 ns.
However, for the future beyond-100G Ethernet, the FEC processing scheme based on the existing physical-layer architecture cannot provide different coding gains according to different requirements due to a limitation of the maximum coding gain that can be provided in the scheme, and the latency introduced in the scheme is too large to meet a latency requirement of the beyond-1000 Ethernet.